Microchip Navitas 800V Design Cuts a Power Stage, but Deployment Is the Hard Part

Microchip and Navitas introduced an 800V-to-6V reference design that removes one conversion stage from the power path feeding next-generation AI racks. The Microchip Navitas 800V design targets up to 96% peak efficiency at full load while switching at 1 MHz. Its arrival turns the industry’s 800V plans into a more concrete engineering choice.

The design combines Microchip’s digital power controllers and hardware security with Navitas Semiconductor’s gallium nitride power devices. It converts 800V DC directly to a 6V intermediate bus near the GPU board. That approach challenges the established route through a 50V or 54V intermediate stage.

The announcement matters because NVIDIA wants 800V DC infrastructure ready for megawatt-scale AI racks beginning in 2027. However, Microchip and Navitas are entering a field that already includes Texas Instruments, STMicroelectronics, Infineon, Delta, Eaton, Schneider Electric, and Vertiv. A compact converter is therefore only one part of a much larger deployment contest.

The Microchip Navitas 800V Design Goes Directly to 6V

The central change is not simply a higher input voltage. It is the decision to collapse two conversion stages into one compact converter.

Microchip and Navitas announced the collaboration on October 5, 2026. They presented the design during the Open Compute Project Global Summit in San Jose, held from October 12 through October 15.

The companies supply a reference board, supporting software, and design documentation. Developers can use these materials as a starting point for rack power systems aligned with emerging Open Compute Project specifications.

A reference design is not a finished power supply that an operator can install immediately. It is a tested technical blueprint that equipment makers can evaluate, modify, and integrate into their own products. That distinction matters when assessing how close the technology is to commercial deployment.

The platform receives an 800V direct-current input and produces a 6V output near the compute tray. According to the companies’ reference design, the compact form factor is intended for space-constrained racks.

Conventional architectures often convert 800V to approximately 50V before producing the lower voltage required near a processor. The new board combines those operations into a single converter. Fewer stages can reduce cumulative losses, component count, and occupied space.

The power board uses 16 Navitas NV6034 GaNFast transistors in a stacked half-bridge arrangement on its primary side. Gallium nitride, commonly called GaN, is a wide-bandgap semiconductor suited to fast, efficient power switching.

Each NV6034 device is rated at 650V with an on-resistance of 17 milliohms, according to the announcement. Stacking devices lets the topology manage an 800V input while using those 650V components.

Navitas packages the transistors in dual-side-cooled DFN8×8 packages. Cooling through both sides lowers thermal resistance and supports higher continuous power in a thin assembly. The board is approximately 20% thinner than a mobile phone, according to the companies.

The claimed performance target is up to 96% peak efficiency at full load. The board also targets a power density of 2,100 watts per cubic inch while operating at a 1 MHz switching frequency.

Those figures remain vendor targets rather than independent production measurements. Efficiency also varies with load, temperature, cooling, and surrounding system components. A peak value does not describe performance across every operating condition.

Microchip contributes its dsPIC33AK digital signal controller, which manages the converter’s switching behavior in real time. Digital control lets engineers tune voltage regulation, fault responses, and transient behavior through firmware rather than fixed analog circuitry.

The controller uses a 200 MHz, 32-bit core and includes double-precision floating-point processing. It also provides pulse-width modulation with 78-picosecond resolution and 12-bit analog-to-digital converters operating at up to 40 million samples per second.

These capabilities matter because GPU loads can change extremely quickly. The power converter must keep the 6V output stable as processors move between different computational states. Poor transient response can cause voltage deviations that disrupt expensive compute hardware.

Microchip also adds a TA100 security chip. It provides a hardware root of trust, meaning the system can anchor device identity and software verification in dedicated hardware.

The chip supports secure boot, authenticated firmware, protected updates, key management, and message authentication. These features recognize that digitally controlled power equipment becomes part of a data center’s connected attack surface.

That combination gives the design its clearest differentiation. Navitas supplies high-frequency GaN switching, while Microchip supplies deterministic control and embedded security. The partnership packages those functions into an engineering platform rather than selling an isolated power transistor.

Still, the announcement does not identify a server manufacturer or hyperscale operator that has selected the board. It also does not provide production volumes, qualification results, or a commercial deployment date. Those omissions define the distance between a convincing reference design and installed infrastructure.

AI Rack Density Is Forcing the 800V Decision

The move toward 800V is being driven by current, copper, and physical space, not by a preference for a new electrical standard.

Power equals voltage multiplied by current. If rack power rises while distribution voltage stays near 54V, the current must rise sharply. Higher current requires larger conductors and creates more resistive heat.

This relationship becomes difficult at the power levels planned for future AI systems. NVIDIA says traditional 54V rack distribution was built for kilowatt-scale equipment, not racks approaching one megawatt.

The company estimates that a 1 MW rack using 54V distribution could require as much as 200 kilograms of copper busbar. Across a one-gigawatt facility, rack busbars alone could consume up to 200,000 kilograms of copper.

Power shelves create another constraint. NVIDIA says a Kyber-class rack using the existing approach could require up to 64 rack units for power shelves. A standard rack cannot surrender that much volume without displacing its compute equipment.

Raising the distribution voltage lowers the current needed to deliver the same amount of power. Lower current can reduce conductor size, electrical losses, cooling demand, and the physical volume assigned to power delivery.

NVIDIA’s published 800V architecture converts 13.8 kV grid power to 800V DC near the data center perimeter. The facility can then distribute that voltage toward equipment rows and racks.

NVIDIA claims the architecture can improve end-to-end efficiency by up to 5% compared with current 54V systems. It also says the same infrastructure can support rack loads from 100 kW to more than 1 MW.

These are system-level projections from the company promoting the architecture. Actual results will depend on rectifiers, busways, protection equipment, converters, cooling, redundancy, and operating loads.

The Microchip Navitas 800V design addresses the final conversion near the compute board. It does not replace the rectifiers, busways, batteries, safety equipment, or facility distribution needed upstream.

This narrower scope is still important. Each conversion stage loses some energy and occupies space. Combining the 800V-to-50V and 50V-to-6V stages can improve the path between the high-voltage bus and the processor’s point-of-load regulators.

The final voltage conversion still happens below 6V. Modern processors operate at voltages below one volt and draw very high current. Multiphase voltage regulators must therefore sit close to the GPU or accelerator package.

A 6V intermediate bus can reduce the distance traveled at the highest current levels. It can also bring energy storage and regulation closer to the processor, improving the response to sudden workload changes.

That proximity is valuable during AI training and inference. Thousands of accelerators can change activity together, causing fast load swings across a cluster. The power system must absorb those changes without destabilizing the rack or facility.

NVIDIA, Google, and Microsoft have pursued 800V architecture through the Open Compute Project. NVIDIA reported in August that more than 80 equipment and infrastructure companies were building products around the shared specifications.

The group’s support gives component suppliers a target interface. It does not guarantee that every supplier’s equipment will interoperate or that operators will adopt one uniform topology.

Existing facilities also create a practical limit. Most data centers distribute AC power through infrastructure installed long before 800V rack systems appeared. Replacing that equipment throughout a live facility would be expensive and operationally risky.

NVIDIA’s near-term answer is an 800V power rack that can operate within an existing AC data center. The system converts power within the row and delivers 800V DC to adjacent compute racks.

The company said its MGX-compatible power rack would arrive during the second half of 2026. It also outlined a row power center supporting up to 2 MW per row, with availability expected in 2027.

This hybrid route makes the transition incremental. Operators can retain their building-level AC infrastructure while introducing high-voltage DC closer to selected AI systems. New facilities can eventually use a more direct DC path.

For developers and enterprise buyers, the result is a change beneath the visible compute layer. GPU roadmaps increasingly depend on electrical designs that determine how many accelerators fit inside a rack and how reliably they run.

Direct 800V-to-6V Conversion Raises the Competitive Pressure

Microchip and Navitas are competing against the extra conversion stage, but they must also outperform rival direct-conversion designs.

The primary contest is between direct conversion and multistage conversion. A multistage architecture divides a difficult voltage transformation into smaller steps, often simplifying component stress, regulation, and product reuse.

Direct conversion removes intermediate hardware. It promises fewer loss points and a smaller footprint, but it also creates a demanding voltage ratio within one converter.

Moving from 800V to 6V means reducing voltage by more than 99%. The converter must provide isolation, accurate control, fast transient response, and safe fault handling within a compact space.

High switching frequency helps shrink transformers, inductors, and capacitors. However, faster switching can increase electromagnetic interference and switching losses if the semiconductor devices, packaging, and control timing are not carefully optimized.

GaN devices support this strategy because they can switch faster than many traditional silicon power components. Their reduced switching losses can help maintain efficiency at frequencies that enable smaller magnetic components.

The stacked half-bridge topology is another critical choice. It divides voltage stress across devices, but control timing must prevent unequal voltage sharing or damaging transients. Microchip’s controller manages that switching sequence.

Microchip says its high-resolution pulse-width modulators support the precision needed for this task. Navitas says the dual-side-cooled packaging lets its GaN devices sustain higher power without sacrificing the board’s thin profile.

The result is technically credible, but the competitive field is already crowded. Texas Instruments announced its own direct 800V-to-6V converter architecture in March 2026.

TI’s power architecture targets 97.6% peak efficiency and more than 2,000 watts per cubic inch. It also includes an 800V hot-swap controller, capacitor equipment, and a 6V-to-below-1V conversion stage.

Those claims are not directly comparable without matching test conditions. TI cites peak efficiency, while Microchip and Navitas target up to 96% at full load. Input range, output power, cooling, isolation, and measurement methods can change the result.

STMicroelectronics has also announced 800V-to-6V and 800V-to-12V architectures. Its broader portfolio includes an 800V-to-50V stage, allowing equipment makers to choose among several intermediate buses.

ST argues that 50V, 12V, and 6V buses will coexist because server form factors and thermal requirements vary. Its conversion portfolio therefore challenges the idea that one voltage path will dominate every rack.

That coexistence is likely during the transition. A 50V bus has an established supply chain and can support modular power shelves. A 6V bus reduces stages but places more responsibility on a specialized converter near the processor.

Microchip and Navitas also compete through security. Firmware-controlled power systems need authenticated updates because altered control code could cause shutdowns, damage equipment, or undermine availability.

The TA100 security chip supports secure boot and code authentication. It also handles trusted firmware updates and common key-management operations. These capabilities can reduce the work required to add a hardware trust anchor.

Security alone will not decide the market. Buyers will also consider component availability, failure behavior, serviceability, thermal performance, and compatibility with their preferred GPU platforms.

Microchip’s broad controller business may help equipment makers source control and security from one vendor. Navitas contributes specialized GaN expertise and compact packaging. Their partnership combines those strengths without requiring either company to supply the entire power chain.

Rivals can offer a different advantage. TI and ST provide extensive analog, sensing, protection, and power portfolios. Larger suppliers may simplify procurement for manufacturers seeking a complete architecture from fewer vendors.

NVIDIA also lists numerous silicon and infrastructure partners. The open ecosystem reduces dependence on one supplier, but it increases pressure on every design to prove measurable value.

The Microchip Navitas 800V design therefore cannot win solely because it supports 800V. It must show that direct conversion remains efficient across real workloads and survives the qualification process required for critical infrastructure.

Efficiency Claims Do Not Resolve Safety or Reliability

A high peak-efficiency figure says little about fault containment, lifetime performance, or behavior during violent GPU load changes.

High-voltage DC presents different protection challenges from conventional AC distribution. An AC current crosses zero during every cycle, which can help extinguish an electrical arc. DC does not provide that natural interruption point.

An 800V system therefore needs carefully designed isolation, disconnects, fuses, hot-swap controls, and fault detection. Service procedures must also prevent technicians from encountering stored energy in capacitors or battery equipment.

Texas Instruments notes that 800V architectures require isolated sensing, gate drivers, battery monitoring, and specialized protection. These components sit outside the central switching board but remain necessary for a complete product.

The reference board’s compact construction creates another tradeoff. High power density places heat sources close together, increasing dependence on packaging, airflow, or liquid cooling.

Dual-side cooling can lower the devices’ thermal resistance. It does not eliminate heat, and the surrounding equipment must carry that heat away during sustained high-power operation.

Efficiency also requires context. A converter operating at 96% efficiency loses 4% of the energy passing through it. At large scale, that remaining loss can still produce substantial heat near sensitive compute equipment.

The companies have not published a complete efficiency curve showing light-load, mid-load, and full-load behavior. They also have not disclosed output power, thermal conditions, or a public third-party validation report.

These gaps do not invalidate the design. They mean the announcement should be read as an engineering milestone rather than evidence of production readiness.

Reliability testing will be especially important. Data center components must tolerate temperature cycling, electrical transients, manufacturing variation, and continuous operation over long service periods.

GaN has gained adoption in consumer adapters, industrial systems, electric vehicles, and renewable-energy equipment. AI rack power imposes its own combination of switching frequency, availability requirements, and tightly coupled thermal conditions.

The stacked topology also needs predictable fault behavior. If one device fails or switches incorrectly, the remaining components may experience excessive voltage. Designers must show that protection reacts before a local fault spreads.

Digital control adds flexibility, but it also introduces software risk. Engineers must manage firmware versions, update procedures, timing behavior, and recovery from corrupted or interrupted updates.

Microchip’s hardware security can authenticate code before execution. That protects against unauthorized firmware, but it cannot guarantee that authorized firmware is free from bugs.

A secure update mechanism also needs an operational process. Operators must decide who signs releases, how keys are protected, and how equipment recovers when an update cannot complete.

Interoperability creates another uncertainty. An OCP-aligned interface provides a common direction, but complete systems join components from multiple suppliers. Differences in telemetry, protection timing, grounding, and control behavior can emerge during integration.

The transition also affects redundancy. Existing facilities often use established AC uninterruptible power systems and replaceable power shelves. New DC architectures redistribute those functions across rectifiers, batteries, busways, sidecars, and rack converters.

Operators will need evidence that the new arrangement meets their availability targets. A small efficiency gain will not compensate for more frequent outages or difficult maintenance.

The design’s close placement beside a GPU board improves electrical response, but it may complicate replacement. Technicians need a service model that avoids disturbing costly compute trays when a power module fails.

Supply continuity presents a commercial risk. Equipment makers will want qualified alternatives for controllers, transistors, magnetics, and packaging. A highly optimized design can become difficult to reproduce with substitute parts.

The industry’s open-standard effort helps by attracting multiple suppliers. However, parallel designs do not automatically create interchangeable products.

Microchip and Navitas say the platform shortens development cycles and reduces design risk. That is a reasonable purpose for a documented reference board. It is not proof that customers have completed qualification or committed to volume orders.

The most meaningful next evidence will come from system makers. An original equipment manufacturer can test the board inside a complete server, under realistic cooling and workload conditions.

Independent measurements should cover efficiency across the full load range. They should also include transient response, electromagnetic compatibility, fault isolation, and operation after repeated thermal cycling.

Until those results appear, the 96% target remains an informed vendor claim. The engineering direction is clear, but production reliability is still the unresolved part of the story.

Three Signals Will Show Whether 800V Reaches Production

The next stage of the 800V transition depends on customer qualification, system-level testing, and deployment evidence rather than additional component announcements.

The first signal is adoption by a server manufacturer, power-supply vendor, or hyperscale operator. A named design win would show that the Microchip Navitas 800V design has progressed beyond demonstrations and evaluation boards.

The strongest announcement would identify the target system and expected deployment window. It would also clarify whether the board powers a 6V bus inside a compute tray or serves another rack-level role.

A design win would strengthen the case for direct 800V-to-6V conversion. Continued silence would not prove failure, because infrastructure qualification can remain confidential and take considerable time.

However, repeated demonstrations without a customer would weaken claims about accelerated deployment. Equipment buyers care about validated integration more than exhibition-floor performance.

The second signal is complete test data under realistic loads. Microchip and Navitas should publish an efficiency curve, output power, cooling conditions, transient response, and protection behavior.

GPU power demand is dynamic rather than constant. A useful test should show how quickly the converter recovers when load rises or falls, including any voltage overshoot or undershoot.

Measurements should also explain the 96% full-load claim. Engineers need the input voltage range, output current, ambient temperature, and boundary used to calculate efficiency.

Third-party verification would add credibility. Independent laboratories, server manufacturers, or OCP contributors can test performance using shared methods.

These results would strengthen the design if it retains efficiency and stability across real operating conditions. Material performance gaps would favor multistage designs or competing direct converters.

The third signal is deployment of NVIDIA’s wider 800V roadmap. The component ecosystem depends on compute platforms and facilities adopting the high-voltage bus at meaningful scale.

NVIDIA has tied full-scale 800V production to its Kyber rack architecture in 2027. Its more immediate deployment roadmap includes hybrid power racks for existing AC facilities.

A functioning hybrid installation would show that operators can introduce 800V without rebuilding an entire data center. It would also test coordination among rectifiers, busways, protection equipment, batteries, and rack converters.

Delays in those deployments would weaken near-term demand for specialized 800V-to-6V hardware. Conversely, production orders for compatible racks would turn today’s design contest into a supply-chain competition.

Readers should also watch which intermediate voltage gains support from server makers. STMicroelectronics expects 50V, 12V, and 6V paths to coexist. That view reflects different rack layouts and cooling strategies.

If major platforms standardize around 6V near the processor, Microchip and Navitas will have targeted an important point in the architecture. If manufacturers retain 50V modularity, direct conversion may remain limited to selected systems.

The outcome will not be decided by a single efficiency number. It will depend on whether the complete power path delivers better density without sacrificing serviceability, safety, or uptime.

For developers, the transition expands the boundary of server engineering. Firmware security, power control, telemetry, and workload behavior now interact more closely. Teams will need to preserve decisions and test evidence across several technical disciplines.

A searchable engineering knowledge base can help teams connect converter data, qualification reports, firmware changes, and incident findings. That documentation becomes more valuable as power hardware grows software-defined.

For enterprise buyers, the practical question is not whether 800V works in principle. It is whether suppliers can turn the architecture into maintainable equipment with verified operating data.

Ask vendors for complete efficiency curves, named interoperability tests, protection behavior, and replacement procedures. Then compare those answers with actual rack density and facility constraints.

The Microchip Navitas 800V design provides a credible direct path from the high-voltage bus to a 6V rail. Its thinner board, GaN switches, digital control, and hardware security address real engineering pressures.

The next proof must come from production systems. Watch for a named customer, independently useful test data, and an operating 800V rack deployment. Those three signals will reveal whether direct conversion becomes infrastructure or remains an impressive reference board.