Navitas Claros Acquisition Reaches the AI Processor, but Production Is Still Ahead

Navitas Semiconductor agreed to acquire Claros for up to $232.8 million, bringing its power portfolio closer to the AI processor than ever before. The Navitas Claros acquisition adds vertical power delivery and integrated voltage regulation to Navitas’s existing gallium nitride and silicon carbide products. Yet the most important assets remain on a development timeline rather than in high-volume production.

The deal gives Navitas a credible answer to a difficult AI infrastructure problem. Faster processors need thousands of amps delivered at low voltage, with minimal electrical loss and almost immediate response. Moving that power across a motherboard consumes space and energy while limiting how quickly current reaches the processor.

Claros proposes moving the final conversion stage beneath or beside the processor package. Navitas can now pitch an architecture extending from the electrical grid to the processor core. However, Infineon already promotes a broad grid-to-core portfolio, while Analog Devices has agreed to acquire vertical-power specialist Empower Semiconductor.

What the Navitas Claros Acquisition Actually Adds

Navitas is buying access to the final and most processor-specific stage of AI power delivery.

Navitas signed the definitive merger agreement on August 24, 2026. The transaction values Claros at up to approximately $232.8 million, based on Navitas’s August 21 closing share price.

According to the merger filing, Navitas plans to pay approximately $216 million at closing through cash and Class A common stock. Another approximately $16.9 million in stock depends on Claros achieving specified business milestones during the following two years.

The acquisition has not yet closed. It remains subject to shareholder approval, regulatory requirements, and other customary conditions. Navitas’s filing also identifies integration costs, employee retention, customer reactions, and unrealized synergies as material risks.

Claros develops two connected technologies. Its integrated voltage regulator, or IVR, converts electricity to the very low voltage required by an AI processor. Vertical power delivery, or VPD, moves that conversion path beneath the processor rather than routing high current across the motherboard.

That physical change matters because electrical resistance becomes costly at high current. Even modest resistance produces greater losses as current rises. Longer copper paths also create voltage variations and occupy board area that designers could otherwise use for memory, networking, or cooling hardware.

Traditional voltage regulator modules usually sit beside the processor. They deliver power laterally across the board through copper traces and power planes. This approach has served generations of CPUs and accelerators, but current requirements are increasing faster than motherboard geometry can comfortably accommodate.

Claros vertical power delivery shortens the path between conversion components and processor power contacts. Navitas says that arrangement can reduce losses while improving transient response, which measures how quickly the power system reacts to a sudden workload change.

AI accelerators create especially abrupt power swings. Thousands of computing units can move from low activity to intensive processing within a short interval. If voltage falls outside a safe range, the processor must reduce performance or risk instability.

The deal also brings engineering capabilities beyond a single component. Navitas highlighted digital control, mixed-signal design, passive-component integration, and advanced two-dimensional and three-dimensional packaging in its transaction presentation.

Those skills fill a gap in Navitas’s portfolio. Gallium nitride, or GaN, and silicon carbide, or SiC, are wide-bandgap semiconductor materials used for efficient power conversion. Navitas had concentrated on higher-voltage stages located farther from the processor.

Claros puts the company much closer to the processor package, where operating voltages fall below one volt and currents rise sharply. That is the strategic change readers should remember. Navitas is not acquiring an AI processor designer. It is acquiring technology intended to determine how effectively those processors receive power.

Why AI Processors Are Moving the Power Bottleneck

The acquisition reflects a shift from generating more compute to delivering enough electricity into increasingly dense processor packages.

Data center power discussions often begin with utility capacity, substations, and cooling. Those constraints remain important, but the same problem appears at a much smaller scale inside every accelerator server. Electricity must pass through several conversion stages before reaching billions of transistors.

Navitas describes its intended chain as three broad steps. Grid voltage falls to an 800-volt direct-current distribution level. Another stage converts that supply to approximately six volts near the server board. Claros technology would then convert the remaining voltage to below one volt at the processor.

The exact architecture will vary among customers. Data center operators and server makers are still evaluating how widely to deploy 800-volt direct current, solid-state transformers, and alternative rack designs. Navitas therefore presents a direction of travel, not one mandatory industry blueprint.

The underlying challenge is less speculative. Current increases when processors demand more power at very low operating voltages. Delivering that current through long board-level paths creates conduction losses, voltage droop, and thermal pressure.

Voltage droop occurs when the supply voltage falls during a rapid increase in processor demand. Power hardware must detect and correct the change quickly enough to keep the processor stable. Greater distance and electrical impedance make that response harder.

Claros says its IVR technology addresses this constraint by placing conversion closer to the load. Its design combines power switches, control circuits, and passive elements into a compact system intended for high-current delivery.

The company had fabricated and tested four generations of its regulator before announcing the transaction. It also built a Power Gateway integration laboratory and testbed, according to the Claros deal statement.

Claros also reported working with Samsung Electronics on engineering samples and additional IVR designs. That relationship provides a manufacturing and development path, but it does not establish high-volume deployment in commercial AI servers.

The gap between a tested device and a qualified data center component can be substantial. Customers evaluate efficiency across different loads, thermal behavior, reliability, control software, packaging, and compatibility with processor road maps. Qualification can span multiple product cycles.

This is why the Navitas Claros acquisition should not be read as an immediate processor-market entry. Navitas will not compete with Nvidia, AMD, or custom accelerator designers for the compute engine itself. It wants to own more of the electrical system surrounding that engine.

That distinction also explains the timing. Processor performance depends increasingly on memory bandwidth, networking, cooling, and power delivery. Improvements in one layer have limited value if another layer forces the accelerator to throttle.

Claros vertical power delivery attempts to loosen one of those constraints. If it works at production scale, server designers can place conversion hardware closer to each processor while reducing current travel across the board.

The practical scenario is a dense accelerator platform where several xPUs share a server tray. Each device requires low-voltage power and must respond to fast workload changes. A shorter delivery path can free board space, reduce losses, and support higher package power.

However, system benefits cannot be inferred from component efficiency alone. Designers must account for the complete chain, including upstream conversion, cooling energy, cabling, backup systems, and workload utilization. A gain near the processor does not automatically translate into the same facility-wide gain.

Navitas AI Power Strategy Now Runs From Grid to Core

Navitas is assembling an end-to-end power narrative, but established rivals already sell across much of the same chain.

Before the Claros agreement, Navitas’s AI proposition centered on GaN and SiC devices. These materials can switch electricity efficiently at higher frequencies and voltages than conventional silicon in suitable applications.

SiC targets higher-voltage stages such as grid infrastructure, energy storage, protection systems, and solid-state transformers. GaN can serve faster conversion stages within power supplies and server racks. Claros adds the low-voltage endpoint nearest the processor.

Navitas says the combination would complete its grid-to-xPU portfolio. The company also expects Claros to help more than double its projected 2030 serviceable addressable market to over $8 billion.

That figure is a company forecast rather than booked demand. The transaction presentation divides the opportunity among existing high-power GaN and SiC markets, IVR and VPD products, and a separate junction field-effect transistor portfolio.

Investors should distinguish an addressable market from revenue. A serviceable addressable market estimates the sales categories a supplier believes it can pursue. It does not measure customer commitments, market share, or the probability that products complete qualification.

Still, the broader portfolio can change how Navitas approaches customers. Instead of offering isolated power components, it can discuss conversion from medium-voltage grid infrastructure through the rack and down to the processor core.

That approach resembles the strategy promoted by Infineon. Gartner identified Infineon as the company to beat in AI data center power semiconductors, citing its silicon, SiC, and GaN portfolio across the power chain. The assessment also noted pressure from rivals at the final processor-delivery stage.

Infineon holds advantages that an acquisition alone cannot erase. It has extensive manufacturing operations, established customer relationships, and products across multiple conversion layers. Navitas remains a smaller fabless supplier and relies on manufacturing partners.

The Navitas AI power strategy therefore depends on integration. Its sales teams must connect Claros designs with Navitas devices and reference architectures. Engineering teams must coordinate road maps that operate across very different voltages, packaging methods, and customer groups.

An end-to-end portfolio can help customers reduce supplier coordination. It can also create a harder internal problem. Products must perform well individually, work together where appropriate, and arrive when processor and server platforms need them.

Navitas’s advantage is focus. The company can organize its product road map around high-power markets without maintaining the wider industrial catalog of a diversified semiconductor manufacturer. Claros adds specialized engineers working on a problem directly tied to accelerator density.

Its disadvantage is execution capacity. Pursuing grid infrastructure, rack conversion, and processor-level regulation requires substantial development and customer support. Each layer has different qualification cycles and competitive dynamics.

This tension defines the deal. Navitas wants the strategic reach of a much larger power semiconductor supplier. It must create that reach by integrating specialist technologies, external manufacturing, and a smaller commercial organization.

For customers, the acquisition creates another potential source of coordinated AI power technology. More supplier competition can accelerate technical validation and reduce dependence on any single architecture. It can also make road-map comparisons harder when vendors define end-to-end coverage differently.

A buyer should examine which components are shipping, which exist as samples, and which remain reference designs. The grid-to-core phrase is useful only when tied to production status, efficiency data, thermal performance, and processor compatibility.

Vertical Power Delivery Has Become an Acquisition Target

Navitas is entering a market where larger analog and power-chip companies have already recognized the value of moving conversion closer to the processor.

Analog Devices agreed in May 2026 to acquire Empower Semiconductor, another company focused on integrated voltage regulation and vertical power delivery. Empower’s Crescendo platform places power conversion beneath the processor to shorten the delivery path.

The Empower agreement shows that Navitas is not alone in treating processor-level power as strategic intellectual property. Analog Devices brings a large analog catalog, established customer access, and extensive mixed-signal expertise to the same problem.

Empower and Claros do not offer identical implementations. However, both deals reflect the same industry judgment: power delivery is becoming part of the processor-performance equation rather than a generic supporting function.

Vicor has also spent years developing high-density power modules for processors and accelerator boards. Monolithic Power Systems, Renesas, Infineon, and other suppliers compete across controllers, power stages, modules, and point-of-load conversion.

These companies create pressure on Claros before its products reach broad commercial availability. Customers can choose established modules, revised lateral architectures, or competing vertical systems. Processor makers may also develop tighter power solutions with selected partners.

Packaging is another contested layer. Placing components beneath an expensive accelerator can improve electrical performance, but it introduces mechanical and thermal questions. The power system must fit within limited height, survive assembly, and avoid interfering with cooling.

A vertical regulator can sit beneath the processor package, on the back of the circuit board, or within a more integrated package structure. Each layout changes current paths, repair options, manufacturing complexity, and heat removal.

Thermal design is particularly important. The processor already produces concentrated heat. Adding power conversion nearby shortens the electrical path but places another heat source in a constrained area.

That tradeoff does not invalidate vertical power delivery. It means efficiency, packaging, and cooling must be designed together. A regulator with attractive laboratory performance still needs to operate reliably beside a high-value accelerator under sustained workloads.

The market also has no single winning architecture yet. Some server designs will keep lateral voltage regulators while improving current density and board construction. Others will move selected power stages to the rear of the board. More integrated systems may place conversion within advanced packages.

Claros vertical power delivery must therefore win specific platforms, not merely prove the concept. Processor designers and hyperscalers make architecture choices years before large deployments. Missing one qualification window can delay meaningful revenue until the next generation.

The wave of acquisitions also raises the cost of competing. Independent specialists gain access to larger balance sheets, packaging teams, and customer channels. Navitas’s agreement gives Claros similar support, but the combined company must invest through the commercialization period.

For Navitas, the acquisition is a way to avoid building these capabilities from the beginning. It obtains existing designs, engineering talent, a test environment, and a Samsung relationship. Those assets can shorten development, but they cannot eliminate customer qualification.

The main contest is consequently broader than Navitas against one rival. It is Navitas’s assembled grid-to-core platform against Infineon’s established breadth and the processor-level portfolios forming around Analog Devices and Empower.

That comparison keeps the story grounded. Navitas has moved closer to AI processors, but competitors are moving in the same direction. The winner will be determined by production design wins, reliability, and system-level performance rather than portfolio diagrams.

The Commercialization Gap Is the Deal’s Central Risk

Claros has advanced beyond a paper concept, yet its disclosed schedule places meaningful production after engineering samples and low-volume manufacturing.

Claros emerged from stealth in 2025 and raised a $30 million seed round in March 2026. Investors included General Catalyst and Red Cell Partners. The financing supported IVR development and the company’s broader direct-current data center work.

At that time, Claros said it planned to deliver engineering samples during 2026. Low-volume domestic commercial production was targeted for 2027, followed by high-volume production in 2028, according to Claros production plans.

Those milestones make the acquisition more understandable. Navitas expects Claros to become a growth accelerator from 2028 through 2029, rather than an immediate source of large product revenue.

They also expose the biggest uncertainty. Engineering samples allow customers to test a design, but they do not establish manufacturability, acceptable yields, field reliability, or a committed purchase volume.

A regulator placed near an AI processor must meet a demanding reliability standard. Failure can disable a costly server assembly and disrupt a tightly scheduled data center deployment. Customers will require evidence across temperature, load changes, component aging, and manufacturing variation.

Claros says it has tested four IVR generations. That iteration indicates meaningful engineering progress. Public disclosures do not yet provide enough independent performance data to compare its products across efficiency, current density, thermal behavior, and cost.

Navitas’s claims about breaking the AI infrastructure power wall should therefore be treated as a strategic objective. The company has not yet shown that the combined portfolio has removed a system bottleneck in a shipping customer platform.

Transaction structure adds another consideration. Most of the consideration is due at closing, while a smaller stock component depends on later business milestones. That arrangement offers some performance alignment, but Navitas still assumes substantial integration and development exposure.

The SEC filing lists several related risks. The deal can be delayed or fail to close. Key employees could leave, business relationships could change, and integration costs could exceed expectations. Anticipated synergies might arrive later than planned or not materialize.

Navitas must also protect Claros’s speed. Startups can make rapid design decisions because small teams share a narrow focus. Acquisition processes can introduce reporting layers, portfolio reviews, and dependencies on wider corporate schedules.

At the same time, Claros needs resources that a larger semiconductor organization can provide. Customer support, quality systems, supply-chain management, and long qualification programs become essential when a prototype moves toward production.

The acquisition succeeds only if Navitas adds those capabilities without slowing the technical program. That balance is difficult and measurable. Sample delivery, customer engagement, qualification progress, and production timing will show whether it is working.

Navitas’s financial discipline also matters. Management says the transaction preserves its path toward profitability and should support margin expansion over the medium to long term. Those are forward-looking expectations, not guaranteed outcomes.

Investment in Claros will continue before high-volume revenue arrives. Navitas must fund engineering, packaging, software, test operations, and customer qualification while supporting its existing GaN and SiC road maps.

There is also an architectural risk. If major customers favor a different voltage distribution level, package format, or power-partner model, Claros may need to adapt. AI infrastructure is developing quickly, and standards remain fluid across racks and processor platforms.

The company could still create valuable intellectual property even if one implementation changes. However, the economic return depends on turning that technology into repeatable product shipments. Patents, samples, and partnerships are inputs, not the final commercial result.

Three Signals Will Show Whether the Strategy Is Working

The next phase should be judged through customer validation, manufacturing progress, and evidence that the broader Navitas portfolio sells as one system.

The first signal is the delivery and evaluation of Claros engineering samples. Navitas and Claros have discussed 2026 samples developed through their Samsung relationship. Meeting that schedule would support the stated production road map.

Sample delivery alone is not enough. The stronger signal would be disclosure that a processor designer, server manufacturer, or major data center customer is evaluating the technology for a named platform. A qualification program would connect laboratory progress to a possible commercial product.

Readers should look for efficiency results under realistic processor loads, not only peak component figures. Useful disclosures would cover rapid load changes, sustained thermal conditions, current density, and performance inside a complete server-board design.

A delay into 2027 would weaken the proposed timeline. It would leave less room for qualification before planned low-volume production and increase the risk that competing designs capture the relevant platform windows.

The second signal is manufacturing progress. Claros previously targeted low-volume U.S. production in 2027 and high-volume production in 2028. Navitas should eventually identify packaging partners, production readiness milestones, and reliability testing status.

Manufacturing matters because vertical power delivery combines semiconductor design with physical integration. Yield problems in the regulator, package, passive components, or board assembly can affect cost and availability.

High-volume readiness would strengthen the case that Navitas bought a scalable product platform. Repeated schedule changes or vague production language would suggest the acquisition remains primarily a technology option.

The Samsung collaboration deserves close attention here. Progress toward additional IVR designs or qualified manufacturing would reduce execution risk. A relationship limited to early fabrication would provide less evidence about production scale.

The third signal is cross-portfolio customer adoption. Navitas wants to supply multiple stages from the grid to the xPU. The strategic claim gains weight if one customer adopts both its upstream GaN or SiC products and Claros processor-level technology.

That outcome does not require every conversion stage to come from Navitas. In practice, customers will mix suppliers according to performance, availability, and existing designs. Even two linked design wins could show that the combined sales proposition has practical value.

Future earnings calls should separate Claros development milestones from broad addressable-market estimates. Investors need design-win progress, sample status, qualification timing, and production expectations. Those indicators are more informative than the size of a projected market.

Competitive responses will provide another useful reference. Infineon, Analog Devices, Vicor, and other suppliers will continue announcing denser power stages, package improvements, and customer collaborations. Navitas must show differentiation beyond owning technologies in each part of a diagram.

For developers and enterprise AI buyers, the impact will appear indirectly. Better processor power delivery can support denser systems, but it does not guarantee lower computing costs. Hardware utilization, cooling, electricity contracts, networking, and software efficiency remain decisive.

Technical teams evaluating new AI infrastructure should preserve product claims, qualification updates, and architecture decisions in a searchable engineering knowledge base. The important comparison will span several processor generations and supplier road maps.

The Navitas Claros acquisition has given Navitas a coherent answer to the final stage of AI power delivery. It has not yet established that Claros can ship at scale or displace established alternatives.

Watch for named customer evaluations, production qualification, and combined design wins. Those three signals will reveal whether Navitas truly built a grid-to-core business or simply acquired the missing block in its presentation.