NVIDIA Cisco USFP Optics Keep Pluggable Networks in the AI Factory Race

NVIDIA and Cisco introduced USFP with a fourfold density claim, giving pluggable optics a new route into larger AI factories. The NVIDIA Cisco USFP optics design targets 400Gb/s electrical lanes and up to 12.8Tb/s of aggregate module capacity. Yet the companies announced a development plan, not shipping hardware or a finished standard.

That distinction creates the real tension. NVIDIA already promotes co-packaged optics, or CPO, which places optical engines beside switch silicon to reduce electrical transmission distances. USFP instead keeps the optical module removable from the switch or network adapter. It tries to preserve familiar maintenance while raising bandwidth density.

The announcement therefore represents more than another connector format. It is a bet that operators will still value replaceable, multi-vendor modules as network power and density become harder constraints. Broadcom and other suppliers are advancing CPO at the same time, making architecture selection a live competitive question.

What NVIDIA and Cisco Actually Announced

USFP is a proposed optical module format that combines faster electrical lanes with a much larger lane count inside an OSFP-sized footprint.

NVIDIA and Cisco unveiled plans for Ultra-Dense Small Form Factor Pluggable, or USFP, on October 12 at the 2026 Open Compute Project Global Summit. Their joint USFP announcement describes it as a high-density module for future Ethernet AI fabrics.

A pluggable transceiver converts electrical signals from a switch or network adapter into optical signals carried through fiber. Technicians can remove and replace the module without replacing the switch itself. That operating model has helped pluggable optics spread across several data center network generations.

The first planned USFP modules would place 16 full-duplex lanes inside a footprint comparable to OSFP, a current high-capacity pluggable format. Each lane would support 400Gb/s electrical signaling. Cisco says that configuration provides 6.4Tb/s of aggregate capacity, with a planned path to 32 lanes and 12.8Tb/s.

Those figures describe the module architecture, not a single Ethernet connection running at 12.8Tb/s. The design can divide its capacity among multiple links, including connections to switches and SuperNICs. A SuperNIC is a network adapter optimized for high-throughput, accelerated computing clusters.

Compared with 200Gb/s-per-lane pluggable modules, NVIDIA and Cisco claim four times the bandwidth and front-panel bandwidth density. They also project approximately 1.3 times greater power efficiency. Both comparisons remain vendor projections until production hardware receives independent testing.

The physical format matters because switch faceplates have finite space. Existing designs cannot simply add ports forever as every connection becomes faster. Increasing capacity inside each module lets a switch serve more bandwidth without proportionally expanding its front panel.

Cisco and NVIDIA are working with TE Connectivity and Amphenol on connectors, cages, and modules. Those components determine how a transceiver attaches mechanically and electrically to its host system. Their participation gives the proposal experienced manufacturing partners, but it does not establish broad market adoption.

The companies also plan a community-led, multi-source project for an open industry specification. A multi-source agreement lets competing vendors build interoperable components around shared mechanical and electrical requirements. The final specification, contributor list, qualification process, and implementation schedule were not included in the announcement.

That gap matters. Data center operators need more than a promising design before committing to a new format. They need validated modules, host systems, thermal guidance, management interfaces, second sources, and a credible supply roadmap.

USFP currently offers a technical direction and an ecosystem-building proposal. Its announced specifications are ambitious, but the market still needs to see finished products operating at scale.

Why AI Factories Need More Bandwidth per Switch

The immediate problem is not simply faster links. AI builders need to connect more accelerators without adding network layers that consume power and delay traffic.

Large AI systems divide work across many accelerators. Training sends parameters, gradients, and intermediate results among those devices. Distributed inference also moves model state and requests across servers, storage systems, and network services.

These workloads create sustained flows that differ from ordinary enterprise traffic. An accelerator can sit idle while it waits for data from another device. Expensive compute capacity then produces no useful work, even when the GPUs themselves operate correctly.

Networks address growth by increasing link speed, adding ports, or introducing more switches. The last option can create additional network tiers. Every new tier adds optical links, switch silicon, power conversion, cooling demand, management work, and possible congestion points.

USFP attacks that problem through density. Doubling electrical signaling from 200Gb/s to 400Gb/s per lane increases capacity without doubling the number of physical lanes. Expanding the module from eight lanes to 16 compounds that gain.

This mechanism explains the fourfold density claim. The proposed module doubles lane speed and doubles lane count within a footprint similar to OSFP. It therefore offers four times the aggregate bandwidth associated with current eight-lane, 200Gb/s designs.

Higher front-panel density would let designers connect more 1.6Tb/s endpoints from one switch. It could also reduce the need for extra switches when expanding a fabric. Fewer tiers would simplify some topologies and reduce the number of optical conversions between accelerators.

Power is the second constraint. Every watt consumed by networking is unavailable to processors, memory, cooling, or facility overhead. NVIDIA and Cisco argue that 400G SerDes technology improves the energy used per transmitted bit. SerDes circuits serialize and deserialize data between chips and high-speed links.

However, a 1.3-times efficiency improvement does not mean that an entire switch consumes less total power. A denser system can draw more absolute power while moving substantially more data. Operators must evaluate energy per bit, module heat, switch consumption, and cooling together.

The Cisco OCP portfolio places USFP beside new switch silicon and systems. Cisco said its 102.4Tb/s Silicon One G300 had entered customer sampling, while initial G300-based systems were shipping. It also announced a 51.2Tb/s G302 chip for top-of-rack systems.

That broader context shows why optics cannot advance independently. Switch application-specific integrated circuits must expose enough bandwidth to use denser modules. Circuit boards must carry faster signals, and connectors must preserve signal integrity at 400Gb/s per lane.

Thermal engineering becomes equally important. More lanes concentrate electrical and optical activity in a small area. A compact module therefore needs a credible cooling design, especially when many modules occupy one switch faceplate.

AI builders face this constraint at both cluster and facility levels. A single rack may need dense connections to neighboring racks. Larger deployments must coordinate traffic across rows, halls, or separate data centers.

USFP specifically addresses the local scale-out fabric rather than every optical connection in an AI facility. Long-distance data center interconnects use different optical technologies and operating requirements. Treating all optical networking as one market would obscure that distinction.

The proposal is relevant because it focuses on a costly bottleneck between compute systems. If it avoids another network tier, its value extends beyond headline bandwidth. It can affect accelerator utilization, physical footprint, failure domains, and the power assigned to moving each bit.

NVIDIA Cisco USFP Optics Challenge the Rush Toward CPO

The central contest is pluggable serviceability against the density and efficiency promised by optics integrated beside switch silicon.

CPO shortens the electrical path between a switch chip and its optical engines. High-speed electrical signals lose energy and signal quality while traveling across circuit boards. Moving optical conversion closer to the chip can reduce that burden.

This architecture becomes more attractive as lane rates rise. Conventional front-panel modules require electrical signals to travel from the switch chip across the board and through a connector. At 400Gb/s per lane, maintaining signal quality across that path becomes harder.

Yet CPO changes the maintenance model. A failed pluggable module can be removed from the front of a switch. A failure involving co-packaged optical components can require more involved service and potentially affect a larger assembly.

The NVIDIA Cisco USFP optics proposal argues that better module engineering can extend the pluggable model into the 400G-per-lane generation. It does not deny CPO’s efficiency advantages. Instead, it claims that operators should retain architectural choice.

Cisco explicitly says future networks will use pluggable, near-packaged, and co-packaged designs. Its USFP design account emphasizes replaceable modules, established supply chains, and interoperability. That language frames USFP as one route through the bandwidth problem, not a universal replacement.

NVIDIA is also advancing the competing route. Its Spectrum-X Ethernet Photonics switches use co-packaged optics with 200Gb/s SerDes. NVIDIA says those systems deliver five times better power efficiency and five times longer AI uptime than networks using traditional transceivers.

Those figures come from NVIDIA and should not be treated as independent benchmarks. They also compare a complete CPO system with traditional transceivers, while USFP targets a later 400G-per-lane generation. The products and comparison baselines are not identical.

Still, NVIDIA’s simultaneous support for CPO and USFP is revealing. It suggests the company expects AI fabrics to split across operating requirements. The largest clusters may prioritize maximum integration, while other deployments may place greater value on field replacement and supplier choice.

Broadcom adds pressure from another direction. The company has presented a 102.4Tb/s Ethernet switch with CPO and a 400G-per-lane optical digital signal processor. A DSP corrects and encodes high-speed signals before optical transmission.

Broadcom said its Taurus 400G-per-lane platform supports current 1.6Tb/s modules and creates a foundation for future 3.2Tb/s transceivers. Its OFC product portfolio shows that 400G-per-lane development is not limited to NVIDIA and Cisco.

The competition therefore does not reduce to one company against another. It is a contest between infrastructure models. Both sides need high-speed SerDes, optical components, packaging, fiber connectivity, management software, and manufacturing scale.

Pluggables offer modular replacement and a familiar procurement model. Operators can qualify modules separately, stock spares, and replace a failed unit at the front panel. A multi-source ecosystem can also prevent dependence on one transceiver supplier.

CPO promises shorter electrical paths and greater integration. It can free front-panel constraints and improve efficiency at very high switch capacities. Its challenges include packaging complexity, thermal design, fiber attachment, external laser management, and service procedures.

Linear pluggable optics, or LPO, presents a further route. LPO removes or simplifies digital signal processing inside the module to reduce power and latency. That approach preserves a removable format but can demand tighter coordination between host electronics and optics.

The wider market will probably use more than one architecture. Different designs can serve scale-up links within an AI system, scale-out networks among systems, and scale-across connections among facilities. Distance, topology, repair policy, and energy constraints will shape each decision.

USFP’s importance lies in preventing the industry from treating CPO as the only credible answer to rising lane speeds. It gives the pluggable ecosystem a proposed format designed around the same 400G-per-lane transition.

That does not guarantee victory. The format must reach production before CPO gains overwhelming advantages in density, cost, or operational maturity. It must also prove that replaceability remains valuable enough to justify longer electrical paths and front-panel packaging.

Serviceability Is USFP’s Advantage and Its Hardest Test

USFP succeeds only if it preserves practical replaceability without sacrificing the signal integrity, cooling, and interoperability required at 400Gb/s per lane.

Pluggable optics have a straightforward operational appeal. When a module fails, a technician can identify it, remove it, install a replacement, and restore the link. The switch chassis can remain in service while other ports continue operating.

That workflow matters in large clusters, where component failures are routine rather than exceptional. A network containing thousands of links needs predictable repair procedures. Operators also need telemetry that isolates a fault to the module, connector, fiber, board, or switch silicon.

USFP must preserve this simplicity under more demanding physical conditions. Faster electrical signaling narrows the margin for loss, noise, reflections, and manufacturing variation. The module-host interface must work consistently across vendors and production batches.

The connector is not a minor accessory. It sits directly in the high-speed signal path. Small differences in materials, geometry, assembly, or tolerances can affect performance at 400Gb/s per lane.

TE Connectivity and Amphenol strengthen the project because both companies build high-speed interconnect components. Their participation can help turn an electrical diagram into a manufacturable connector and cage system. However, the announcement does not identify qualified products or volume dates.

Thermal behavior creates another test. A 16-lane module concentrates substantial electronics within a compact body. Its heat must leave the module without damaging neighboring optics or forcing impractical airflow.

The claimed 1.3-times power efficiency addresses energy per unit of data. Operators will still need absolute module power, inlet temperature limits, airflow requirements, and behavior across full switch configurations. A laboratory module and a fully populated system face different conditions.

Interoperability also needs a broader definition than physical fit. A module can slide into a cage yet fail to operate properly with a host. Electrical signaling, firmware, management interfaces, diagnostics, error handling, and optical specifications all require alignment.

The proposed multi-source effort is therefore central to the story. NVIDIA and Cisco need other module makers, switch vendors, silicon suppliers, and operators to participate. Without them, an open specification can remain open on paper while functioning as a narrow vendor ecosystem.

The industry also needs agreement around 400G-per-lane signaling. The IEEE formed a study effort around this transition during 2026. Its public 400G lane work includes electrical, optical, copper, near-packaged, and co-packaged considerations.

That standards activity shows the technology is still moving through definition and validation. USFP cannot independently settle every physical-layer requirement. Its development must align with wider Ethernet and interconnect work.

The announcement leaves several practical questions unanswered. NVIDIA and Cisco did not provide sampling dates, production dates, module reach options, host power limits, pricing, or a published specification. They also did not name prospective switch systems that will accept USFP.

No hyperscaler or AI cloud operator appeared as a committed customer in the announcement. TE Connectivity and Amphenol support the component ecosystem, but supplier participation differs from customer adoption. Buyers will ultimately decide whether the serviceability tradeoff justifies another module format.

Backward compatibility needs careful interpretation. Cisco says USFP provides a path supporting 200G and 400G SerDes-based systems and application-specific integrated circuits. That does not necessarily mean operators can insert USFP modules into existing OSFP cages.

A similar footprint is not proof of mechanical, electrical, thermal, or software compatibility. Operators should wait for the specification before assuming existing systems can be upgraded through a module swap.

The density calculation also deserves scrutiny. Four times the front-panel bandwidth is a design-level comparison with 200G-per-lane pluggables. Real deployments depend on link breakout, fiber routing, reach, switch radix, cable management, and failure policy.

Furthermore, removing a network tier does not happen automatically. A topology must expose enough ports and usable capacity in the right places. Oversubscription, congestion control, and workload placement still influence cluster performance.

This uncertainty does not make USFP unimportant. It defines what the announcement actually represents. NVIDIA and Cisco have presented a serious architectural proposal with credible component partners, but not a finished product ecosystem.

For buyers, the correct response is neither dismissal nor immediate commitment. They should examine whether their future fabric values hot replacement, vendor diversity, and familiar operations more than maximum optical integration.

What Happens Next for NVIDIA and Cisco USFP

Three signals will determine whether USFP becomes a durable platform or remains an attractive specification proposal.

The first signal is publication of the multi-source specification. It should define mechanical dimensions, electrical interfaces, thermal envelopes, management behavior, and compliance requirements. Public access and a broad contributor list would strengthen claims of openness.

Participation matters as much as publication. Support from additional optical module makers would reduce supply concentration. Support from switch silicon vendors and system manufacturers would show that USFP can extend beyond products controlled by NVIDIA and Cisco.

The second signal is working 400G-per-lane hardware. Engineering samples should demonstrate stable links across more than one host and module supplier. Useful disclosures would include bit-error performance, module power, temperature behavior, reach, and failure recovery.

Independent testing will be especially important. The fourfold bandwidth density follows from the architecture’s lane count and speed. The 1.3-times efficiency claim needs measurements under defined workloads and comparable system conditions.

The third signal is a named deployment. A hyperscaler, neocloud, or enterprise AI operator would provide evidence that the format solves a practical network design problem. A purchase commitment alone would be less persuasive than qualification across real switches, fibers, and operational tools.

The timing of CPO deployments will affect that decision. NVIDIA says its Spectrum-X Ethernet Photonics systems are already in production for its Vera Rubin platform. The company’s Rubin network plan names CoreWeave, Lambda, and Oracle Cloud Infrastructure among initial CPO adopters.

If those deployments deliver efficiency and reliability without creating difficult repair procedures, the argument for CPO will strengthen. If service complexity slows adoption, USFP’s removable design will look more valuable.

Broadcom’s progress will provide another benchmark. Shipping systems with mature CPO or widely adopted 400G-per-lane components would pressure the USFP group to publish specifications and product schedules. Delays would give established OSFP and CPO roadmaps more time to consolidate.

Buyers should also watch how suppliers describe failure domains. A replaceable module limits some repairs to one port. Integrated optics can affect a larger assembly, although system architecture and redundancy can reduce the operational impact.

The decision will not rest on raw bandwidth alone. Operators will compare total switch capacity, watts per bit, cooling, fiber management, replacement time, spare inventory, vendor choice, and software visibility. They will also consider how often optical failures occur in deployed systems.

NVIDIA and Cisco have positioned USFP as an extension of proven operations. That promise will be tested through mundane details, including connector durability, firmware behavior, supply consistency, and technician access. These factors rarely lead launch announcements, but they shape infrastructure purchases.

The NVIDIA Cisco USFP optics effort deserves attention because it keeps a real architectural choice alive. It proposes that removable modules can survive the 400G-per-lane transition without surrendering the density needed by future AI fabrics.

Its strongest argument is operational continuity. Its greatest risk is that physics and integration demands make that continuity too expensive. The next specification, interoperable prototype, and customer deployment will show which side carries more weight.

Infrastructure teams planning their next AI fabric should ask a direct question: which failure and upgrade model can they operate for years? They should compare USFP, current pluggables, LPO, and CPO against their actual topology and maintenance constraints. Headline throughput is only the starting point. The format that wins will be the one that moves enough data while remaining manufacturable, serviceable, and available from multiple suppliers.